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The Study Of Architecture And Programming Model Of 8086

The Study Of Architecture And Programming Model Of 8086 Architecture of 8086 Fig 1 Architecture or functional block of 8086 microprocessor As shown in the above Fig 1 the CPU of 8086 is divided into two parts 1 BIU Bus Interface Unit 2 EU Execution Unit 1 BIU Bus Interface Unit The function Of BIU is to send address to a Fetch the instruction or data from memory b Write the data to memory c Write the data to the port d Read data from the port Various Section of the BIU are given below Segment Registers BIU has 4 segment registers of 16 bit each i e CS DS SS and ES Code Segment CS Is used to address a memory location in the code segment of the memory where the op code of program is stored Data Segment DS Is the register which points to segment of memory where the data is stored Stack Segment SS Is the register used to point out the stack location in stack segment of the memory and used to store data temporarily on the stack Extra Segment ES Is to address the segment which is additional data segment used to store data 



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